Responsibilities:
- Set up and maintain DFT flow, familiar with script language
- Be responsible for the definition and implementation of different schemes of DFT aspects: including scan/MBIST/JTAG insertion, ATPG generation, and test patterns generation
- Experience RTL/netlist simulation, good debug capability, and familiar with Verilog
- Experience with ATE online debugging and DFT diagnosis. Experience with Post-silicon DPPM improvement, and coverage hole analysis
Requirements:
- Bachelor or master’s degree in Microelectronics, Electronics, Electrical Engineering, Computer Science or relevant disciplines
- Good knowledge and experience in DFT implementation methodology, flow optimization, and DFT coverage improvement. Mentor tool is a plus
- Strong problem-solving skills, self-motivated, and good team player
Career Development Opportunities:
Bright Minds. Bright Futures.
We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.